Metal-enclosed capacitor banks and harmonic filter banks are custom-engineered systems whose enclosure dimensions, components, compartment arrangements, electrical ratings, and protection schemes can vary substantially from one project to another. Because these variables directly affect the performance of an enclosure during an internal arcing fault, it is generally not economically practical to perform destructive internal-arc testing in accordance with IEEE Std C37.20.7 for each unique equipment configuration. The standard itself recognizes that changes in enclosure size, installed equipment, and structural configuration can affect the arc-resistant performance of a previously tested design.

When arc-resistant construction is desired, VarStec can incorporate enclosure design principles intended to contain and redirect the effects of an internal arcing fault and strive to meet the personnel-protection intent of IEEE Std C37.20.7. However, without testing of the specific equipment configuration, VarStec does not represent the equipment as having an IEEE C37.20.7 arc-resistant rating. Instead, our primary emphasis is on reducing the likelihood and consequences of an arc-flash event: preventing faults where practical, limiting the current and energy delivered into a fault, reducing fault-clearing time, minimizing operator error and personnel exposure, and applying appropriate protection, interlocking, component selection, commissioning, and maintenance practices.

VarStec Perspective: Arc-resistant enclosure construction is one layer of protection, not the entire arc-flash mitigation strategy employed by VarStec. Our objective is first to prevent the fault, then to reduce its energy and duration, keep personnel away from the hazard, and finally control the effects of the event if one occurs.

VarStec’s position is simple: Overdesign to prevent the fault → Reduce fault energy and duration → Minimize personnel exposure → Control the effects.

This technical Q&A explains how VarStec applies this philosophy to the design, protection, operation, installation, commissioning, and maintenance of its metal-enclosed capacitor banks and harmonic filter banks.

Arc Flash Fundamentals & VarStec’s Position

VarStec uses a layered approach to arc flash mitigation rather than relying on any single protective measure. Our philosophy follows four priorities:

Prevent the fault → Reduce its energy and duration → Reduce personnel exposure → Control the effects.

The first priority is to reduce the probability that an internal fault occurs at all. This begins with proper equipment design, component selection and application, insulation coordination, capacitor switching practices, protective relaying, interlocking, manufacturing quality, installation, commissioning, and maintenance.

If a fault does occur, the next objective is to limit the energy delivered into the fault and reduce its duration through appropriate current-limiting devices, protective relaying, fault detection, and coordination with the upstream protective device. Personnel exposure can then be further reduced through equipment location, remote operation, delayed switching, viewing provisions, and operating procedures that minimize the need for workers to be near energized equipment.

Finally, where arc-resistant enclosure construction is desired, the enclosure can be designed to help contain and redirect the pressure, hot gases, and other effects of an internal arcing event away from personnel. VarStec considers this an important additional layer of protection, but not a substitute for preventing the fault or limiting the energy that feeds it.

This philosophy is consistent with limitations recognized in IEEE Std C37.20.7. In the 2007 edition, Section 1.2.4, Relevance of tests, recognizes that internal-arcing tests cannot reproduce every condition that may occur in service and states that even equipment proven by testing cannot be guaranteed to withstand every possible internal arcing fault. The prescribed test also initiates the arc at defined locations within the compartment under test, while Section 7.1 recognizes that internal arcing can occur in many different areas of the equipment.

For VarStec, therefore, arc-resistant construction is one layer of protection, not the entire arc-flash mitigation strategy. The strongest approach is to address the complete chain of events that could lead to an arc-flash incident and provide multiple opportunities to prevent the fault, interrupt it quickly, separate personnel from it, and control its effects.

Because preventing the arc eliminates the event rather than merely managing its consequences.

Internal faults can originate from component failure, insulation breakdown, incorrect assembly, contamination, moisture, switching misoperation, inadequate maintenance, overvoltages, wildlife, and human error. Many of these causes can be addressed through proper engineering before an arc ever develops.

IEEE C37.20.7 itself identifies preventive measures such as proper dimensions, workmanship, correct torque, interlocks, maintenance, partial-discharge monitoring, surge protection, insulation coordination, and control of moisture, pollution, and vermin.

Not directly in the same manner that it applies to switchgear. IEEE Std C37.20.7 is written for switchgear, not specifically for metal-enclosed capacitor banks or harmonic filter banks. The current edition is IEEE Std C37.20.7-2024, IEEE Recommended Practice for Testing Switchgear Rated Up to 52 kV for Internal Arcing Faults.

IEEE C37.20.7-2007  specifically establishes test methods for metal-enclosed switchgear defined by IEEE C37.20.1, C37.20.2, and C37.20.3. It also states that its tests apply to arcing faults occurring in air within the enclosure and exclude internal arcing faults occurring inside components such as instrument transformers, fuses, and sealed interrupting devices.

VarStec nevertheless considers IEEE C37.20.7 extremely useful as an engineering reference for enclosure strength, compartmentalization, pressure relief, accessibility, installation, protection, and internal-arc mitigation.

The distinction is important: using C37.20.7 principles is not the same as claiming an IEEE C37.20.7 arc-resistant rating.

VarStec can incorporate enclosure construction principles associated with Type 1 or Type 2 protection, including reinforced construction, compartmentalization, pressure relief, and directing gases away from normally accessible areas. Under IEEE C37.20.7 terminology, however, Type 1 and Type 2 are associated with equipment performance demonstrated through the prescribed internal-arcing tests.

IEEE C37.20.7 standard defines Type 1 as protection at the freely accessible front and Type 2 as protection at the freely accessible exterior, front, rear, and sides.

Because VarStec capacitor banks and harmonic filter banks are custom-engineered and are not destructively arc-tested for every project configuration, VarStec does not represent an untested configuration as having an IEEE C37.20.7 Type 1 or Type 2 arc-resistant rating. When arc-resistant construction is desired, however, we can design the enclosure with the intent of meeting the applicable personnel-protection objectives of IEEE C37.20.7. We then go beyond enclosure construction by applying additional arc-flash mitigation measures throughout the equipment design: preventing the fault, reducing its energy and duration, reducing personnel exposure, and controlling the effects if an internal arcing event occurs.

Because virtually every system is different.

Capacitor bank rating, filter topology, number of stages, enclosure dimensions, compartment arrangement, bus configuration, reactors, capacitors, switching devices, fuses, cable entry, ventilation, and pressure-relief paths can all vary from one project to another. Destructive arc testing every unique combination would be impractical and cost-prohibitive.

The standard itself recognizes this problem. It permits results from one tested design to be extended only where another configuration can reasonably be considered similar and the original test is more onerous. It also warns that changes in enclosure dimensions, internal components, or structure can affect arc-resistant performance.

VarStec therefore concentrates engineering effort on preventing faults, reducing fault energy, minimizing exposure, and incorporating robust enclosure design rather than implying that one destructive test validates every custom configuration.

An internal arc test demonstrates how a specific equipment configuration performs under defined test conditions, including prospective current, arcing duration, accessibility, enclosure arrangement, pressure relief, and installation conditions.

It does not prove that an internal fault cannot occur, nor does it guarantee successful performance for every possible arcing event. IEEE C37.20.7 explicitly states that not all service conditions can be simulated, arc behavior is not always repeatable, and a successfully tested assembly cannot be guaranteed to withstand every internal arcing fault.

It also makes clear that arc-resistant equipment does not guarantee continued operation after an event; rework or replacement may be required.

Preventing Internal Arc Faults

Fault prevention begins with identifying and eliminating the conditions that can initiate a fault. VarStec incorporates multiple design and protection measures intended to address component failure, switching failures, insulation breakdown, environmental conditions, and operator error.

Depending on the application, these measures may include:

  • Preventing misoperation and human error: key interlocks, clear operating and warning signage, viewing windows, medium-voltage indication, and detailed operating, installation, commissioning, and maintenance instructions.
  • Reducing electrical and component failures: properly applied capacitor switching devices to minimize prestrike and restrike, capacitor fuse and blown-fuse protection, split-wye neutral-current detection where applicable, surge arresters, insulated bus and bus joints, increased BIL, and increased voltage or current ratings for capacitors, reactors, switching devices, and other critical components. These increased ratings often add relatively little cost compared with the total equipment cost.
  • Controlling environmental and thermal conditions: enclosure heaters to reduce condensation and tracking, adequate ventilation, maintainable air filters, and screens to prevent rodents or other foreign material from entering the enclosure.
  • Detecting problems before they develop into faults: thermal and overload protection, harmonic-voltage and harmonic-current monitoring, infrared inspection ports, ultrasound inspection ports, smoke detection, and partial-discharge monitoring. These features can identify overheating, insulation deterioration, abnormal electrical stress, or other developing conditions before they progress to an internal arcing fault.

The objective used on all of VarStec’s designs is to break as many links in the fault chain as practical before an internal arc can develop. Arc-flash mitigation therefore starts long before enclosure containment becomes necessary; it starts with the electrical design, component application, protection system, enclosure environment, operating philosophy, commissioning, and ongoing condition monitoring.

Many serious electrical events begin with an incorrect operating sequence.

Mechanical and electrical key interlocks prevent access to energized compartments, prevent grounding switches from being operated under inappropriate conditions, enforce disconnecting and grounding sequences, and reduce dependence on operator memory.

Control logic provides another layer of protection by preventing out-of-sequence operation, inhibiting capacitor-stage switching during maintenance conditions, or introducing deliberate operating delays that allow personnel to move away before switching occurs.

The objective is to make the safe operating sequence inherent in the equipment, rather than relying solely on procedural compliance.

Capacitor switching is a severe electrical duty.

The switching device must be appropriate for capacitor-bank inrush current, transient and power frequency recovery voltages, restrike performance, operating frequency, and the actual bank configuration. An improperly applied switch increases the probability of prestrike, restrike, insulation flashover, capacitor case rupture, or switching device failure. For this reason, capacitor switching should be treated as an engineered application.

Operating a component farther from its electrical and thermal rating provides additional margin against abnormal conditions, system changes, manufacturing tolerances, contamination, and aging.

Depending on the application, VarStec may consider higher capacitor voltage ratings, increased reactor current ratings, increased switching-device ratings, higher insulation levels, or additional bus insulation. These measures can be relatively inexpensive compared with the total equipment cost but can materially reduce the probability of a component failure and internal arc.

VarStec specifies direct fuse sensing to detect fuse overheating before failure. The fuse is equipped with a thermal element that allows the protection system to trip the capacitor bank before the fuse enters thermal runaway.

When a blown-fuse detection system is used, VarStec prefers split-wye neutral-current detection. We have found that this arrangement reduces the transient recovery voltage (TRV) imposed on the capacitor switching device, reducing the likelihood of restrike and the potential for a resulting flashover event.

Commissioning:
A well-designed capacitor bank can still fail if it is installed or commissioned incorrectly. Proper installation and commissioning are fundamental to preventing equipment failure.

Maintenance:
Follow the manufacturer’s maintenance procedures, including periodic cleaning or replacement of enclosure ventilation filters.

Condition monitoring:
Infrared inspection ports, ultrasound inspection ports, smoke detection, partial-discharge monitoring, thermal sensing, overload protection, and harmonic-voltage and harmonic-current monitoring can identify conditions that may lead to equipment failure before it happens.

Reducing Arc Energy and Fault Duration

VarStec reduces the energy delivered into an internal fault by focusing on the two electrical parameters that can be influenced most directly: fault-current magnitude and fault-clearing time. This can include current-limiting fuses, high-speed protection, arc-detection relays, differential protection, maintenance-mode settings, upstream breaker coordination, and ultra-fast arc-mitigation systems. The objective is to detect the fault rapidly and interrupt or divert the source before substantial energy can be delivered into the arc. IEEE C37.20.7 similarly recommends supplemental protection even for arc-resistant equipment and specifically identifies current-limiting fuses, differential protection, and arc-sensing systems as potential means of limiting the total energy delivered to an internal fault.

Current-limiting fuses are extremely effective for high-current faults because they limit both the peak fault current and the duration of the fault current well before a fault reaches its prospective peak. They are therefore an important part of capacitor bank and harmonic filter protection and can substantially reduce the energy associated with faults within the enclosure. They should not be treated as a complete arc-flash solution. At lower fault-current levels, fuse clearing takes longer and the device may no longer be operating within its current-limiting region.

Because arc-flash energy is directly related to how long the fault is allowed to persist, faster fault detection and clearing can significantly reduce incident energy and equipment damage. Depending on the application, VarStec may use one or more of the following methods to reduce fault-clearing time:

  • Arc-flash detection relays: Detect an internal arc and issue a trip command in as little as 2 ms. Because detection is very fast, total fault-clearing time is largely determined by the operating time of the upstream circuit breaker.
  • Bus differential protection: Detects faults within the protected zone and can issue a trip command in approximately 4 ms. Again, total clearing time is limited by breaker operating time.
  • Maintenance mode: Places the feeder protection in a faster, more sensitive setting while personnel are near the equipment. It can also inhibit capacitor-stage switching, reducing the possibility of a switching failure or restrike while maintenance personnel are present.
  • Ultra-Fast Earthing Switch (UFES): ABB’s UFES combines arc detection with an ultra-fast earthing switch to extinguish an internal arc in approximately 4 ms from arc ignition to extinction (arc duration is therefore no longer dependent on upstream breaker clearing time). This greatly reduces equipment damage, internal pressure and temperature buildup, and personnel hazard.

VarStec Perspective:
The  ABB UFES System operates so quickly that damage can often be limited to the component that initiated the fault, allowing the equipment to be returned to service after the failed component is replaced. This is a major advantage for process-critical capacitor banks, harmonic filter banks, and hybrid STATCOM + capacitor bank systems. In addition to improving personnel protection during an arc-flash event, the UFES system significantly limits additional equipment damage from internal arcs, thereby avoiding prolonged and potentially very costly downtime associated with major equipment repair or replacement.

Reducing Worker Exposure and Controlling Arc Effects

One of the simplest ways to reduce arc-flash exposure is to remove the worker from the immediate vicinity of the equipment.

Unlike switchgear that may require frequent operator interaction, medium-voltage capacitor banks and harmonic filter banks generally require relatively little hands-on operation. Where practical, they can therefore be located outdoors or in less frequently occupied portions of a substation.

Remote control and protection interfaces, remote switching, viewing windows, external indication, and delayed switching sequences can further reduce the need for personnel to stand adjacent to energized equipment while switching occurs.

Arc-resistant enclosure construction is intended to contain and redirect the pressure, hot gases, and other effects of an internal arcing fault away from personnel. It does not prevent the fault or reduce the energy of the arc.

For this reason, VarStec treats arc-resistant construction as the final layer of its mitigation strategy: Prevent the fault → Reduce its energy and duration → Reduce personnel exposure → Control the effects.

When arc-resistant construction is desired, VarStec can design the enclosure with the intent of meeting the applicable personnel-protection objectives of IEEE C37.20.7. Without testing of the specific equipment configuration, however, VarStec does not represent the equipment as having an IEEE C37.20.7 arc-resistant rating.

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